Evaluating transport triggered architectures for scalar applications
نویسنده
چکیده
In transport triggered architectures (TTAs) the programming and operational model is mirrored when compared with regular RISC and VLIW architectures; instead of programming operations which cause data transports as side eeects, in TTAs the transports are programmed, where a transport may trigger an operation if necessary. Transports are therefore visible at the architecture level, and are completely programmer controlled. The main advantages of TTAs are its simplicity and exibility. Transport triggered architectures also have certain advantages with respect to scheduling freedom and transport utilization. This paper concentrates on a quantiication of advantages related to code generation for scalar (non-numeric) applications.
منابع مشابه
Evaluating Template-Based Instruction Compression on Transport Triggered Architectures
In embedded systems, memory is one of the most expensive resources. Due to this, program code size has turned out to be one of the most critical design constraints. Code compression is one of the approaches to reduce the program code size; it results in smaller memories and reduced cost of the chip. Furthermore, code compression can decrease the power consumption of the chip. In this paper, a c...
متن کاملComparing Software Pipelining for an Operation-Triggered and a Transport-Triggered Architecture
This paper reports the results of a comparison between a new class of architectures, called transport-triggered architectures, and traditional architectures, called operation-t~iggered architectures. It does this comparison by means of the MOVE-i860, which is a transport-triggered approximation of the i860. Several benchmarks are scheduled for the MOVE-i860 by a software pipelining scheduler. B...
متن کاملOn Efficiency of Transport Triggered Architectures in DSP Applications
The trend in programmable architectures for digital signal processing (DSP) is to move towards high-level language programming, which sets high requirements for compilers to efficiently exploit the instruction level parallelism in modern processors. In this paper, efficiency of transport triggered architectures (TTA) in DSP applications is discussed. The efficiency of a high-level compiler on a...
متن کاملCode generation for Transport Triggered Architectures 3
Transport triggered architectures (TTAs) form a class of architectures which are programmed by specifying data transports between function units. As side effect of these data transports these function units perform operations. Making these data transports visible at the architectural level contributes to the flexibility and scalability of processors. Furthermore it enables several extra code sc...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
عنوان ژورنال:
- Microprocessing and Microprogramming
دوره 38 شماره
صفحات -
تاریخ انتشار 1993